Freescale Semiconductor /MKW21Z4 /PIT /MCR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as MCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)FRZ 0 (0)MDIS

FRZ=0, MDIS=0

Description

PIT Module Control Register

Fields

FRZ

Freeze

0 (0): Timers continue to run in Debug mode.

1 (1): Timers are stopped in Debug mode.

MDIS

Module Disable - (PIT section)

0 (0): Clock for standard PIT timers is enabled.

1 (1): Clock for standard PIT timers is disabled.

Links

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